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Processor and Sensor Interfacing on FPGA for STP-H12-VANTAGE Space Mission

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Previous SHREC Missions STP-H5-CSP – Demonstration of CSP and hybrid COTS + rad-hard architecture STP-H6-SSIVP – Parallel and distributed computing with multiple CSPs STP-H7-CASPR – Onboard processing with next-gen sensors and apps STP-H12-VANTAGE Visual And Neuromorphic Tracking And Geosensing Experiment Correlation of neuromorphic and visual sensor data Advancing usage of COTS SoMs supplemented with rad-hard monitoring and watchdog circuitry

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Processor and Sensor Interfacing on FPGA for STP-H12-VANTAGE Space Mission

Presenter Information

Christopher Brubaker, University of PittsburghFollow

Alan D. George, University of PittsburghFollow

Session

Poster Session 1

Location

Salt Palace Convention Center, Salt Lake City, UT

Abstract

Previous SHREC Missions STP-H5-CSP – Demonstration of CSP and hybrid COTS + rad-hard architecture STP-H6-SSIVP – Parallel and distributed computing with multiple CSPs STP-H7-CASPR – Onboard processing with next-gen sensors and apps

STP-H12-VANTAGE Visual And Neuromorphic Tracking And Geosensing Experiment Correlation of neuromorphic and visual sensor data Advancing usage of COTS SoMs supplemented with rad-hard monitoring and watchdog circuitry

Document Type

Event

SSC26-P1-66 (1).pdf (1714 kB)

Paper

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Since August 21, 2026

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Aerospace Engineering Commons

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Aug 23rd, 12:00 AM

Processor and Sensor Interfacing on FPGA for STP-H12-VANTAGE Space Mission

Salt Palace Convention Center, Salt Lake City, UT

Previous SHREC Missions STP-H5-CSP – Demonstration of CSP and hybrid COTS + rad-hard architecture STP-H6-SSIVP – Parallel and distributed computing with multiple CSPs STP-H7-CASPR – Onboard processing with next-gen sensors and apps

STP-H12-VANTAGE Visual And Neuromorphic Tracking And Geosensing Experiment Correlation of neuromorphic and visual sensor data Advancing usage of COTS SoMs supplemented with rad-hard monitoring and watchdog circuitry

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